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Organization

The Chinese University of Hong Kong
Presenters
Guojin Chen
Yeh-Ching Chung
Farzan Farnia
Zhuolun He
Tsung-Yi Ho
Shi-Hao Hong
Sadaf Khan
Qiuxia Lai
Min Li
Peiyu Liao
Hongduo Liu
Jinwei Liu
Siting Liu
Tianji Liu
Zehua Pei
Yuan Pu
Zili Shao
Zili Shao
Zhengyuan Shi
Fangzhou Wang
Zixiao WANG
Ziyi Wang
Martin Wong
Hong Xu
Qiang Xu
Evangeline Young
Bei Yu
Yu Zhang
Wenqian Zhao
Su Zheng
Session Chairs
Jinwei Liu
Zili Shao
Presentations
Research Manuscript
Accelerating DNN Inference with Heterogeneous Multi-DPU Engines
AI
Cloud
RISC-V
AI/ML Architecture Design
Research Manuscript
Concurrent Sign-off Timing Optimization via Deep Steiner Points Refinement
EDA
Physical Design and Verification
Work-in-Progress Poster
CR2: A Compressed ReRAM-based DNN Accelerator by Combining Computation and Read operation
AI
Autonomous Systems
Cloud
Design
EDA
Embedded Systems
RISC-V
Security
Work-in-Progress Poster
DeepSeq: Deep Sequential Circuit Learning
AI
Autonomous Systems
Cloud
Design
EDA
Embedded Systems
RISC-V
Security
Research Manuscript
DiffPattern: Layout Pattern Generation via Discrete Diffusion
EDA
Design for Manufacturing and Reliability
Research Manuscript
EDGE: Efficient DAG-based Global Routing Engine
EDA
Physical Design and Verification
Research Manuscript
Eficient ILT via Multi-level Lithography Simulation
EDA
Design for Manufacturing and Reliability
Research Manuscript
Global floorplanning via semidefinite programming
EDA
Physical Design and Verification
Research Manuscript
Layout Decomposition via Boolean Satisfiability
EDA
Design for Manufacturing and Reliability
Research Manuscript
Lightning Talk - Model, Framework and Integration for In-Storage Computing with Computational SSDs
Cloud
Embedded Systems
Embedded Memory, Storage and Networking
Research Manuscript
LRSDP: Low-Rank SDP for Triple Patterning Lithography Layout Decomposition
EDA
Design for Manufacturing and Reliability
Research Manuscript
Mitigating Distribution Shift for Congestion Optimization in Global Placement
EDA
Physical Design and Verification
Research Manuscript
On a Moreau Envelope Wirelength Model for Analytical Global Placement
EDA
Physical Design and Verification
Research Manuscript
On EDA-Driven Learning for SAT Solving
AI
AI/ML Algorithms
Research Manuscript
OpenDRC: An Efficient Open-Source Design Rule Checking Engine with Hierarchical GPU Acceleration
EDA
Physical Design and Verification
Research Manuscript
Physics-Informed Optical Kernel Regression Using Complex-valued Neural Fields
EDA
Design for Manufacturing and Reliability
Research Manuscript
Restructure-Tolerant Timing Prediction via Multimodal Fusion
EDA
RISC-V
Timing and Low Power Design
Research Manuscript
Rethinking AIG Resynthesis in Parallel*
EDA
RTL/Logic Level and High-level Synthesis
Sessions
Research Manuscript
Learning with Drives and Convertibles - from Near Data to Cloud
Cloud
Embedded Systems
Embedded Memory, Storage and Networking
Research Manuscript
Route Me if You Can!
EDA
Physical Design and Verification