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Organization

Tsinghua University
Presenters
Chen Chen
Hong Chen
Yiming Chen
Zhonghao Chen
Tianyu Fu
Jiangyuan Gu
Ke Hong
Yang Hu
Dexuan Huo
Yu Jiang
Dapeng Ju
Mingyen Lee
Qi Li
Qiushi Li
Shiyao Li
Xueqing Li
Yuan Li
Zeqing Li
Zhengdong Li
Zongpeng Li
Youxu Lin
Chang Liu
Jun Liu
Leibo Liu
Ying Liu
Yongpan Liu
Yongqiang Lyu
Yongqiang Lyu
Han Qiu
Ju Ren
Yi Rong
Yunheng Shen
Zhuo Su
Hanbo Sun
Wende Tan
Wenjun Tang
Chen Wang
Chenyu Wang
Dongsheng Wang
Haixia Wang
Jialai Wang
Yu Wang
Zhou Wang
Jingchuan Wei
Shaojun Wei
Shaojun Wei
Jianping Wu
Juejian Wu
Qidie Wu
Huazhong Yang
Xinhao Yang
Shouyi Yin
Zehong Yu
Shulin Zeng
Chao Zhang
Jian Zhang
Jiangwei Zhang
Jilin Zhang
Mingxing ZHANG
Yaoxue Zhang
Youhui zhang
Hongtao Zhong
Kai Zhong
Qiang Zhou
Wenping Zhu
Yihong Zhu
Yu Zhu
Zhenhua Zhu
Presentations
Research Manuscript
An Efficient Accelerator for Point-based and Voxel-based Point Cloud Neural Networks
AI
Cloud
RISC-V
AI/ML Architecture Design
Research Manuscript
ANAS: Asynchronous Neuromorphic Hardware Architecture Search Based on System-Level Simulator
Design
Emerging Models of Computation
Research Manuscript
ASMCap: An Approximate String Matching Accelerator for Genome Sequence Analysis Based on Capacitive Content Addressable Memory
Design
In-memory and Near-memory Computing Circuits
Work-in-Progress Poster
CANCELED - Multi-objective optimization for Floating Point Mix-Precision Tuning
AI
Autonomous Systems
Cloud
Design
EDA
Embedded Systems
RISC-V
Security
Research Manuscript
CPE: An Energy-Efficient Edge-Device Training with Multi-dimensional Compression Mechanism
Design
AI/ML, Digital, and Analog Circuits
Research Manuscript
DARIC: A Data Reuse-Friendly CGRA for Parallel Data Access via Elastic FIFOs
Design
SoC, Heterogeneous, and Reconfigurable Architectures
Research Manuscript
DiffPattern: Layout Pattern Generation via Discrete Diffusion
EDA
Design for Manufacturing and Reliability
Work-in-Progress Poster
Enabling Efficient NVM-Based Text Analytics without Decompression
AI
Autonomous Systems
Cloud
Design
EDA
Embedded Systems
RISC-V
Security
Work-in-Progress Poster
EPIM: Efficient Processing-In Memory Accelerators based on Epitome
AI
Autonomous Systems
Cloud
Design
EDA
Embedded Systems
RISC-V
Security
Research Manuscript
Fault Tolerance in Time-Sensitive Networking with Mixed-Critical Traffic
Embedded Systems
Time-Critical System Design
Research Manuscript
Leaky MDU: ARM Memory Disambiguation Unit Uncovered and Vulnerabilities Exposed
Security
Embedded and Cross-Layer Security
Research Manuscript
Lightning Talk: Processor Vulnerability Discovery
Security
Hardware Security: Primitives, Architecture, Design & Test
Research Manuscript
Mckeycutter: A High-throughput Key Generator of Classic McEliece on Hardware
Security
Hardware Security: Primitives, Architecture, Design & Test
Research Manuscript
Memory-Efficient and Real-Time SPAD-based dToF Imaging with Spatial and Statistical Correlation
Cloud
Design
Design of Cyber-physical Systems and IoT
Research Manuscript
MPass: Bypassing Learning-based Static Malware Detectors
AI
AI/ML Security/Privacy
Research Manuscript
PIM-HLS: Automatic Hardware Generation and Scheduling for Processing-in-Memory-based Neural Network Accelerators
EDA
RTL/Logic Level and High-level Synthesis
Research Manuscript
Privacy-Preserving DNN Training with Prefetched Meta-Keys on Heterogeneous Neural Network Accelerators
Embedded Systems
RISC-V
Embedded Software
Research Manuscript
Processing-In-Hierarchical-Memory Architecture for Billion-Scale Approximate Nearest Neighbor Search
Design
In-memory and Near-memory Computing Architectures, Applications and Systems
Research Manuscript
PTStore: Lightweight Architectural Support for Page Table Isolation
Security
Embedded and Cross-Layer Security
Research Manuscript
RMP-MEM: A HW/SW Reconfigurable Multi-Port Memory Architecture for Multi-PEA Oriented CGRA
Embedded Systems
Embedded Memory, Storage and Networking
Research Manuscript
STCG: State Aware Test Case Generation for Simulink Models
EDA
Design for Test and Silicon Lifecycle Management
Work-in-Progress Poster
UnrealNAS: do neural architecture search with no labels
AI
Autonomous Systems
Cloud
Design
EDA
Embedded Systems
RISC-V
Security
Research Manuscript
Victor: A Variation-resilient Approach Using Cell-clustered Charge-domain computing for High-density High-throughput MLC CiM
Design
In-memory and Near-memory Computing Circuits