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Organization

Fudan University
Presenters
Chengtao An
Jiarui Bao
Zhaori Bi
Zhijie Cai
Chixiao Chen
Guohao Chen
Jianli Chen
Mingzhi Dong
Zhangcheng Huang
Hao Jiang
Ziyi Ju
Jinmei Lai
Chunqiao Li
Jiawei Li
Xudong Li
Qi Liu
Qingliang Liu
Yiting Liu
Jialin Lu
Ye Lu
Xinkai Nie
Li Shang
Yangfeng Su
Shuyuan Sun
Xingyu Tong
Kun Wang
Chang Wu
Changhao Yan
Fan Yang
Xiaoling Yi
Jun Yu
Xuan Zeng
Jinxin Zhang
Aidong Zhao
Jiapei Zheng
Shuai Zhou
Benchao Zhu
Peng Zou
Presentations
Research Manuscript
A Matching Based Escape Routing Algorithm with Variable Design Rules and Constraints
EDA
Physical Design and Verification
Research Manuscript
Automated Design of Complex Analog Circuits with Multiagent based Reinforcement Learning
EDA
Analog CAD, Simulation, Verification and Test
Research Manuscript
cVTS: A Constrained Voronoi Tree Search Method for High Dimensional Analog Circuit Synthesis
EDA
Analog CAD, Simulation, Verification and Test
Research Manuscript
Disjoint-Path and Golden-Pin Based Irregular PCB Routing with Complex Constraints
EDA
Physical Design and Verification
Work-in-Progress Poster
Efficient Pareto Point Propagation Algorithm for HLS Design Space Exploration
AI
Autonomous Systems
Cloud
Design
EDA
Embedded Systems
RISC-V
Security
Research Manuscript
Eficient ILT via Multi-level Lithography Simulation
EDA
Design for Manufacturing and Reliability
Research Manuscript
FPDsim: A Structural Simulator For Power Grid Analysis Of Flat Panel Display
EDA
Analog CAD, Simulation, Verification and Test
Work-in-Progress Poster
GCN-based Floorplanning with Dirichlet Boundary Conditions
AI
Autonomous Systems
Cloud
Design
EDA
Embedded Systems
RISC-V
Security
Research Manuscript
Graph Representation Learning for Microarchitecture Design Space Exploration
AI
RISC-V
AI/ML Application and Infrastructure
Work-in-Progress Poster
LightFusion: Lightweight CNN Architecture for Enabling Efficient Sensor Fusion in Autonomous Driving
AI
Autonomous Systems
Cloud
Design
EDA
Embedded Systems
RISC-V
Security
Research Manuscript
Mixed-cell-height Placement with Minimum-Implant-Area and Drain-to-Drain Abutment Constraints
EDA
Physical Design and Verification
Research Manuscript
PUFFER: A Routability-Driven Placement Framework via Cell Padding with Multiple Features and Strategy Exploration
EDA
Physical Design and Verification
Research Manuscript
TiPU: A Spatial-Locality-Aware Near-Memory Tile Processing Unit for 3D Point Cloud Neural Network
Autonomous Systems
Cloud
Autonomous Systems (Automotive, Robotics, Drones)
Research Manuscript
Toward Optimal Filler Cell Insertion with Complex Implant Layer Constraints
EDA
Design for Manufacturing and Reliability