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Organization

Shanghai Jiao Tong University
Presenters
Quan Chen
Weidong Chen
yongbiao chen
Yuzhou Chen
Guohao Dai
Minyi Guo
Xinfei Guo
Guanghui He
Yifan Hua
Linpeng Huang
Honglan Jiang
Li Jiang
Naifeng Jing
Gang Li
Haomin Li
Xiangjie Li
Zhenyu Li
Xiaoyao Liang
Xiaolong Lin
Zizhao Liu
Dongxu Lv
Ruoyan Ma
Yehan Ma
Weikang Qian
Guan Shen
Yingtao Shen
Zhuoran Song
Penghao Sun
Sijun Tao
Gang Wang
Xuan Wang
Zhican Wang
Chentao Wu
Ningyi Xu
Ruge Xu
Tao Yang
Tao Yang
Jianguo Yao
Ji Yin
Litong You
Wanru Zhang
Jieru Zhao
Xiaotian Zhao
Shengan Zheng
Jingjing Zhu
An Zou
Presentations
Research Manuscript
AccALS: Accelerating Approximate Logic Synthesis by Selection of Multiple Local Approximate Changes
EDA
RTL/Logic Level and High-level Synthesis
Research Manuscript
AdaS: A Fast and Energy-Efficient CNN Accelerator Exploiting Bit-Sparsity
AI
Cloud
RISC-V
AI/ML Architecture Design
Research Manuscript
An Efficient Accelerator for Point-based and Voxel-based Point Cloud Neural Networks
AI
Cloud
RISC-V
AI/ML Architecture Design
Research Manuscript
Bumblebee: A MemCache Design for Die-stacked and Off-chip Heterogeneous Memory Systems
Design
SoC, Heterogeneous, and Reconfigurable Architectures
Engineering Track Poster
Camelus: Scalable and Generic SIMD Programming for AI Accelerators
Back-End Design
Embedded Systems
Front-End Design
IP
RISC-V
Research Manuscript
COSA: Co-Operative Systolic Arrays for Multi-head Attention Mechanism in Neural Network using Hybrid Data Reuse and Fusion Methodologies*
Design
AI/ML Architecture Design
Work-in-Progress Poster
Design Space Exploration of Layer-Wise Mixed-Precision Quantization with Tightly Integrated Edge Inference Units
AI
Autonomous Systems
Cloud
Design
EDA
Embedded Systems
RISC-V
Security
Research Manuscript
EENet: Energy Efficient Neural Networks with Run-time Power Management
AI
AI/ML Application and Infrastructure
Research Manuscript
FLNA: An Energy-Efficient Point Cloud Feature Learning Accelerator with Dataflow Decoupling
AI
Cloud
RISC-V
AI/ML Architecture Design
Research Manuscript
HyperAttack: An Efficient Attack Framework for HyperDimensional Computing
AI
AI/ML Security/Privacy
Research Manuscript
Learning-based Data Separation for Write Amplification Reduction in Solid State Drives
Cloud
Embedded Systems
Embedded Memory, Storage and Networking
Research Manuscript
MARS: Exploiting Multi-Level Parallelism for DNN Workloads on Adaptive Multi-Accelerator Systems
Design
AI/ML System and Platform Design
Research Manuscript
Memory-Efficient and Real-Time SPAD-based dToF Imaging with Spatial and Statistical Correlation
Cloud
Design
Design of Cyber-physical Systems and IoT
Research Manuscript
PIM-HLS: Automatic Hardware Generation and Scheduling for Processing-in-Memory-based Neural Network Accelerators
EDA
RTL/Logic Level and High-level Synthesis
Research Manuscript
Processing-In-Hierarchical-Memory Architecture for Billion-Scale Approximate Nearest Neighbor Search
Design
In-memory and Near-memory Computing Architectures, Applications and Systems
Research Manuscript
SpMMPlu: A Compiler Plug-in with Sparse IR for Efficient Sparse Matrix Multiplication
AI
AI/ML Application and Infrastructure