Intent Based Timing Constraints
DescriptionIn a timing analysis run, timing constraints are either defined or transferred between design levels. Large number of these constraints are applied on clocks or signals derived from clocks. Constraints' syntax does not make the designer's intent obvious. One has to analyze a number of constraints together to understand the intention behind these. In this presentation, we will cover a novel way of specifying timing constraints that is not only intuitive but also efficient in terms of memory and runtime.
Event Type
Engineering Track Poster
TimeWednesday, July 12th5:39pm - 5:41pm PDT
LocationLevel 2 Exhibit Hall
Back-End Design
Embedded Systems
Front-End Design