Presentation
RV (Reliability Verification) Automation To Improve Execution Efficiency
DescriptionIt has become more and more challenging to design a reliable Integrated circuit for higher lifetimes with shrinking technology node and increase in die sizes. The effort and turnaround time to get a RV clean design is very high in the current technologies. In this paper we have discussed about an automation which helps designer to converge on reliability checks with ease.
This automation identifies the quality of pre-RV collaterals which helps in reducing the number of total iterations and hence the turnaround time. It provides recommendation for the IR and EM violations which helps the user in understanding overall status and the fixes that he/she needs to take it to the design construction flows. If any IR or EM violation needs a layout fix, then the automation will fix it as per the requirement with DRC aware fixes.
In the test cases around ~86% violations are being addressed on average for partitions taken from multiple IPs.
This automation identifies the quality of pre-RV collaterals which helps in reducing the number of total iterations and hence the turnaround time. It provides recommendation for the IR and EM violations which helps the user in understanding overall status and the fixes that he/she needs to take it to the design construction flows. If any IR or EM violation needs a layout fix, then the automation will fix it as per the requirement with DRC aware fixes.
In the test cases around ~86% violations are being addressed on average for partitions taken from multiple IPs.
Event Type
Engineering Track Poster
TimeWednesday, July 12th5:52pm - 5:53pm PDT
LocationLevel 2 Exhibit Hall
Back-End Design
Embedded Systems
Front-End Design
IP
RISC-V