Presentation
Automated and integrated Dynamic Voltage Drop IR-ECO flow on Automotive ADAS SoCs
DescriptionIncreasing functionality and design complexity of Automotive ADAS SOCs has resulted in increasing power grid complexity with high Dynamic Voltage Drops creating significant challenges at lower FinFET nodes. Dynamic Voltage Drop (DVD) leads to change in cell delays resulting in increased setup/hold violations degrading timing QoR. DVD fixes are mostly done manually which take several iterations to fix, impacting time to market. In a design cycle, it is generally too late to fix DVD without affecting timing. Conventional DVD and STA sign-off flows have been mostly dis-joint employing margin-based methodologies that lead to overdesign and sub-optimal PPA. Solving IR issues at ECO stages is both time consuming and costly. We present here an automated and integrated DVD IR-ECO flow and results on two automotive designs on advanced FinFET nodes that effectively addresses above challenges. Our results using this automated IR-ECO flow showed a decrease in DVD violation count by 50% on our designs saving turn-around-time. The IR signoff tool and Timing ECO tool Integration flow enabled simultaneous voltage and timing fixes with fast what-if incremental ECO evaluation. Our flow minimizes design changes for faster PDN convergence and better PPA without degrading timing.
Event Type
Engineering Track Poster
TimeWednesday, July 12th5:18pm - 5:19pm PDT
LocationLevel 2 Exhibit Hall
Back-End Design
Embedded Systems
Front-End Design
IP
RISC-V