Presentation
A novel methodology for EM/IR analysis of Complex LDO/Power gated designs.
DescriptionRF/Automobiles chips are more complex in designs and operate at ultra-high frequencies. Qualcomm custom devices make the design complex compared to other analog and digital designs. Hence there is a requirement for a flow which is dynamic, schematic/layout driven, and which supports the complexity in the chip designs and meet Qualcomm chipset criteria of EM sign off.
When head switches and regulators are present, It is even more difficult to make the setup for the end users. In conventional flow, the internal was brought to the top level and analyzed. The critical part is that we have an internal P/G domain which cannot be always defined as global due to same names at the next hierarchies sometimes. The tool needs to be more intelligent to handle multiple domains at different levels.
The paper presents a novel methodology with a customizable GUI flow to extract the internal P/G domains and to handle the P/G domains after head switches and regulators which are not directly connected to voltage sources.
When head switches and regulators are present, It is even more difficult to make the setup for the end users. In conventional flow, the internal was brought to the top level and analyzed. The critical part is that we have an internal P/G domain which cannot be always defined as global due to same names at the next hierarchies sometimes. The tool needs to be more intelligent to handle multiple domains at different levels.
The paper presents a novel methodology with a customizable GUI flow to extract the internal P/G domains and to handle the P/G domains after head switches and regulators which are not directly connected to voltage sources.
Event Type
Engineering Track Poster
TimeTuesday, July 11th5:00pm - 6:00pm PDT
LocationLevel 2 Exhibit Hall
Back-End Design
Embedded Systems
Front-End Design
IP
RISC-V