Presentation
Emulation Based Automation Platform For SoC Performance Verification
DescriptionAs SoC design becomes more complex, there are millions of combinations of configurations to perform performance verification test.
Manually setting up numerous configurations for several verification scenarios makes human errors more likely to occur and the time required for verification longer.
In addition, even though the experiment execution time is very long due to the nature of the performance verification, there was no environment in which performance indicators could be checked at a glance during runtime. So it was difficult to detect performance issues at the beginning of the test.
Finally, more and more various monitors have been added to the verification environment. It makes the time spent for post-processing required to obtain meaningful results from a huge amount of outputs longer.
So, to overcome these problems and improve the verification environment we propose an automation platform that can be applied to emulation environments
Manually setting up numerous configurations for several verification scenarios makes human errors more likely to occur and the time required for verification longer.
In addition, even though the experiment execution time is very long due to the nature of the performance verification, there was no environment in which performance indicators could be checked at a glance during runtime. So it was difficult to detect performance issues at the beginning of the test.
Finally, more and more various monitors have been added to the verification environment. It makes the time spent for post-processing required to obtain meaningful results from a huge amount of outputs longer.
So, to overcome these problems and improve the verification environment we propose an automation platform that can be applied to emulation environments
Event Type
Front-End Design
TimeTuesday, July 11th2:30pm - 2:45pm PDT
Location2010, 2nd Floor
Front-End Design