Presentation
The Art of Breaking Things Down - Hierarchical Abstraction for Power Sensitive SoC Signoff
DescriptionSoCs complexity has increased multi-fold which takes 3-4 days for sign off runs. To optimize the run time and memory requirement of the run, generally BlackBox based hierarchical flows are utilized.
BlackBox based hierarchical flow provides good gains in terms of runtime and memory but sign off accuracy gets lost.
Other abstract model based hierarchical flows provide the trade-off between signoff accuracy and capacity constraints but adapting them for SoC runs have other constraints such as:
1. Identification of block boundaries will be very difficult for SoC designer without full knowledge of each sub IPs.
2. In the hierarchical verification flow, separate setup needs to be created for each identified IP.
3. Abstract model generation for each IP in sequential manner increases the TAT of SOC run.
4. Hierarchical flows generally doesn't guarantee the accuracy of QoR.
This paper will cover an abstract model based hierarchical validation flow which will be very efficient for SoC run without any trade off against QoR accuracy.
BlackBox based hierarchical flow provides good gains in terms of runtime and memory but sign off accuracy gets lost.
Other abstract model based hierarchical flows provide the trade-off between signoff accuracy and capacity constraints but adapting them for SoC runs have other constraints such as:
1. Identification of block boundaries will be very difficult for SoC designer without full knowledge of each sub IPs.
2. In the hierarchical verification flow, separate setup needs to be created for each identified IP.
3. Abstract model generation for each IP in sequential manner increases the TAT of SOC run.
4. Hierarchical flows generally doesn't guarantee the accuracy of QoR.
This paper will cover an abstract model based hierarchical validation flow which will be very efficient for SoC run without any trade off against QoR accuracy.
Event Type
IP
TimeTuesday, July 11th2:00pm - 2:15pm PDT
Location2012, 2nd Floor
IP
