PBR Bank Conflict Avoidance Scheduling to enhance DRAM bank utilization
DescriptionPer-Bank Refresh (PBR) is a refresh scheme for LPDDR that refreshes DRAM cells at the individual bank level. This is to increase DRAM utilization by allowing normal traffic to access to other remaining banks while a given bank is being refreshed. Even with this enhancement, however, PBR still has a limitation that Bandwidth or unloaded latency can be degraded if the refreshed bank is conflicted with the bank where normal DRAM operation requires to access. And this confliction can occur more frequently at higher refresh rate, where DRAM temperature rises due to an increased bandwidth requirement in high-performance mode for a given system or increased ambient temperature in automotive system. This paper defines two kinds of bank confliction when PBR is executed, and suggests how to alleviate those conflicts to enhance DRAM utilization and latency while performing PBR in accordance with JEDEC requirement. To reduce the bank confliction with PBR, how to select the target PBR bank and how to postpone refresh operation when the PBR bank selection is not available are suggested. The experiment shows that DRAM utilization is enhanced by up to 8.5% due to a decrease in PBR bank confliction when both suggestions of PBR bank selection and refresh postpone are applied.
Event Type
TimeMonday, July 10th4:45pm - 5:00pm PDT
Location2012, 2nd Floor