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Lightning Talk: Equality Saturation for Datapath Synthesis: A Pathway to Pareto Optimality
DescriptionEquality saturation, originally developed in the late 1970s for use in automated theorem provers, has been recently advanced to perform scalable rule-based rewriting for optimizations in various domains, such as program synthesis, compiler optimization, and datapath synthesis. Constructing an e-graph using rewrite rules that preserve program functionality, equality saturation addresses phase ordering problems in rewriting-driven optimizations. This promising approach shows significant potential for achieving Pareto optimality. This paper provides a brief introduction to equality saturation and the open-source tool egg, and highlights its potential application in optimizing datapaths in both RTL and high-level synthesis. We include case studies and outline the opportunities for future work in both datapath and logic synthesis using equality saturation.
Event Type
Research Manuscript
TimeTuesday, July 11th10:30am - 10:40am PDT
Location3002, 3rd Floor
Topics
EDA
Keywords
RTL/Logic Level and High-level Synthesis