Presentation
CTScan: A CGRA-based Platform for Emulation of Power Side-Channel Attacks on CPUs
DescriptionPre-silicon power side-channel evaluation of CPU chips using CAD tools and FPGA is slow. We propose CTScan, a CGRA-based emulation platform for side-channel power attacks. CTScan first maps the CPU microarchitecture onto the underlying CGRA, then profiles attacks on a high-level simulator to obtain the corresponding CPU instruction trace; which is translated to run on the CGRA to collect emulated CPU power traces for analysis. CTScan running on a commercial CGRA board shows 35×(end-to-end), 7×(trace-generation-time) speedup over state-of-the-art FPGAs, while maintaining emulation accuracy. We believe this is the first proposal of CGRAs as a platform for pre-silicon CPU security evaluation.
Event Type
Work-in-Progress Poster
TimeTuesday, July 11th6:00pm - 7:00pm PDT
LocationLevel 2 Lobby
AI
Autonomous Systems
Cloud
Design
EDA
Embedded Systems
RISC-V
Security