Presentation
ALMOST: Adversarial Learning to Mitigate Oracle-less ML Attacks via Synthesis Tuning
DescriptionOracle-less machine learning (ML) attacks have broken various logic locking schemes. In this work, we study
the causal nexus between logic locking, logic synthesis, and ML resilience. The key challenge is that synthesis, when tailored for area-power-delay optimization, yields netlists vulnerable to ML attacks. Thus, we call for security-aware logic synthesis. We propose ALMOST, a framework for adversarial learning to mitigate oracle-less ML attacks via synthesis. A simulated-annealing-based recipe generator, based on adversarially trained models, enables such security-aware synthesis. Our experiments on ISCAS benchmarks confirm that the accuracy of ML attacks drops to around 50% for ALMOST-synthesized circuits.
the causal nexus between logic locking, logic synthesis, and ML resilience. The key challenge is that synthesis, when tailored for area-power-delay optimization, yields netlists vulnerable to ML attacks. Thus, we call for security-aware logic synthesis. We propose ALMOST, a framework for adversarial learning to mitigate oracle-less ML attacks via synthesis. A simulated-annealing-based recipe generator, based on adversarially trained models, enables such security-aware synthesis. Our experiments on ISCAS benchmarks confirm that the accuracy of ML attacks drops to around 50% for ALMOST-synthesized circuits.
Event Type
Research Manuscript
TimeThursday, July 13th4:40pm - 4:55pm PDT
Location3003, 3rd Floor
RISC-V
Security
Hardware Security: Attack and Defense