Presentation
HAIMA: A Hybrid SRAM and DRAM Accelerator-in-Memory Architecture for Transformer
DescriptionResearchers have paid great attention to embedding arithmetic logic units into the memory array to reduce the overhead of data movement during Transformer inference. However, existing work does not consider the heterogeneity of parallelism and resource requirements among layers in Transformer. This not only increases the inference latency, but also causes the problem of low resource utilization. To address the above issue, we propose a hybrid accelerator-in-memory architecture named HAIMA, in which SRAM and DRAM cooperate to speed up the inference. Compared to Newton and TransPIM, our proposed hardware-software co-design architecture achieves 1x-1.5x speedup.
Event Type
Research Manuscript
TimeTuesday, July 11th2:25pm - 2:40pm PDT
Location3010, 3rd Floor
Design
In-memory and Near-memory Computing Architectures, Applications and Systems