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On the unpredictability of SPICE simulations for Side-channel Leakage Verification of Masked Cryptographic Circuits
SessionNew Discoveries in Classical Hardware Security Problems
DescriptionCircuits for cryptography are vulnerable to side-channel (SC) attacks. Masking is a countermeasure which is provable secure under the independent leakage assumption. For a secure implementation of masked circuits, this assumption must be satisfied after layout. SPICE-simulation is expected to be useful for SC verification because of its accuracy. However, we demonstrate that the statistical variation of the power noise amplitude in SPICE-simulation is not always correct for SC verification. We believe it results from the internal time-step creation optimized for efficiency. A small nonlinear function with a domain-oriented masking scheme is used to demonstrate these SPICE-simulation anomalies.
Authors
Kazuki Monta
Kobe University
Makoto Nagata
Kobe University
Josep Balasch
KU Leuven
Ingrid Verbauwhede
KU Leuven
Event Type
Research Manuscript
TimeTuesday, July 11th11:10am - 11:25am PDT
Location3012, 3rd Floor
Topics
RISC-V
Security
Keywords
Hardware Security: Primitives, Architecture, Design & Test
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