Presentation
Mining SoC Message Flows with Self-Attention
DescriptionHigh-quality system-level specifications are necessary to comprehensively validate system-on-chip (SoC) designs. However, manual development and maintenance of such specifications across the entire SoC design flow are daunting tasks. We propose a novel method that utilizes deep sequence modeling to infer comprehensive and accurate message flow specifications from SoC communication traces. The proposed method can overcome the inherent complexity of SoC traces induced by the concurrent executions of system transactions. Furthermore, mined specifications provide a high-level and abstract view of SoC communication behaviors, which can significantly facilitate design understanding and verification.
The proposed method outperforms several existing state-of-the-art trace mining tools.
The proposed method outperforms several existing state-of-the-art trace mining tools.
Event Type
Work-in-Progress Poster
TimeTuesday, July 11th6:00pm - 7:00pm PDT
LocationLevel 2 Lobby
AI
Autonomous Systems
Cloud
Design
EDA
Embedded Systems
RISC-V
Security