Presentation
SuperFlow: A RTL-to-GDS Design Flow for AQFP Superconducting Devices
DescriptionResearchers are fascinated with superconducting circuits due to their extraordinary energy efficiency. However, most of the design tools for superconducting circuits only focus on some stages of the workflow, such as logic synthesis, physical design, or simulation. In this paper, we demonstrate a thorough RTL-to-GDS design flow for Adiabatic Quantum-Flux-Parametron (AQFP) devices. We adopt a CMOS-based open-source synthesis tool and perform technology mapping to generate the AQFP-based netlist. We also present a place-and-route step for AQFP circuits that takes wirelength, timing, and routability into account. Lastly, we generate the AQFP circuit layout and detect violations involved in the layout.
Event Type
Work-in-Progress Poster
TimeTuesday, July 11th6:00pm - 7:00pm PDT
LocationLevel 2 Lobby
AI
Autonomous Systems
Cloud
Design
EDA
Embedded Systems
RISC-V
Security