Presentation
An ML based Semi-Static Predictor for Approximate Load Value in Cache Memory
DescriptionThis paper addresses two essential memory bottlenecks: 1) memory wall (long access latency), and 2) bandwidth wall (limited off-chip bandwidth). To accomplish this objective, our technique manipulates the inherent error resilience of a wide range of applications. We present a novel approximation technique, which predicts the load value, using a machine learning (ML) based predictor. The proposed ML-based model predicts the requested values after individual safe-to-approximate load operations miss in the cache. The proposed technique completely avoids access to the memory. By eliminating the access to the memory, the memory bandwidth is reduced along with the latency access time.
Event Type
Work-in-Progress Poster
TimeTuesday, July 11th6:00pm - 7:00pm PDT
LocationLevel 2 Lobby
AI
Autonomous Systems
Cloud
Design
EDA
Embedded Systems
RISC-V
Security