Presentation
CR2: A Compressed ReRAM-based DNN Accelerator by Combining Computation and Read operation
DescriptionReRAM is considered prominent for AI hardware for it can significantly speed up matrix-vector multiplication operations. When computations are decomposed to a smaller granularity, duplication in weights and inputs produces redundant computations. The current repetition-pruning methods cost an unaffordable overhead to dispatch duplicate results and reconstruct the complete results. We propose to replace part of repeated computations with patterning and reading. A tradeoff is also needed to reduce the indexing and reconstruction overhead. Based on the above scheme, we propose CR2. Experimental results show that CR2 significantly reduces ReRAM crossbars and execution time while keeping eDRAM overhead affordable.
Event Type
Work-in-Progress Poster
TimeWednesday, July 12th6:00pm - 7:00pm PDT
LocationLevel 2 Lobby
AI
Autonomous Systems
Cloud
Design
EDA
Embedded Systems
RISC-V
Security