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FPDsim: A Structural Simulator For Power Grid Analysis Of Flat Panel Display
DescriptionAs the resolution continues to increase, the scale of the power grid of the flat panel display becomes huge. This imposes a severe computational challenge for analysis and storage. In this paper,
based on the highly-periodic FPD structure, we present an efficient simulator which contains a novel stamping scheme and a fast structural solver. Experiments on real industrial cases show that compared to the conventional stamping scheme, our proposed stamping scheme achieves up to 118x speedup in 74x less memory; compared to the state-of-art direct solver, Cholmod, our proposed structural solver achieves up to 17x speedup in 5x less memory.
Event Type
Research Manuscript
TimeTuesday, July 11th4:40pm - 4:55pm PDT
Location3002, 3rd Floor
Topics
EDA
Keywords
Analog CAD, Simulation, Verification and Test