Presentation
Critical Paths Prediction Under Multiple Corners Based on BiLSTM Network
SessionAll Routes to Timing Closure
DescriptionCritical paths search under multiple corners has become the runtime bottleneck of STA. In this paper, a critical paths prediction framework under multiple corners for the early stage of design is proposed, in which the BiLSTM and MLP network are used to extract the path timing information in logic synthesis stage as sequence features and global features, respectively. Experimental results demonstrate that the prediction accuracy of critical paths is greater than 93.5% and 89.6% for seen and unseen circuits in terms of f1-score, as well as 7.9% and 13.6% higher than that of the existing learning-based critical paths prediction method.
Event Type
Research Manuscript
TimeTuesday, July 11th2:10pm - 2:25pm PDT
Location3002, 3rd Floor
EDA
RISC-V
Timing and Low Power Design