Reinforcing Circuit and Layout Synthesis
DescriptionCircuit and layout synthesis are important steps in design flows for building integrated circuits (ICs). However, conventionally, many steps, from digital logic to analog layout, are either governed by various heuristics-based optimizations or implemented by humans. Designers may have to rely heavily on their knowledge and experience to achieve design closure. Reinforcement learning (RL) has lately acquired attention to replacing human expertise in chip design. An optimization problem can be converted into a control problem in MDP, where design optimization targets are translated into environmental rewards, and design variables are converted into environmental actions. An RL agent can learn an effective policy in selecting the actions based on the current environmental state.
This particular tutorial aims to present the recent developments in applying RL in both digital and analog circuit synthesis. We demonstrate the learning-driven synthesis algorithms that give more consistent and efficient results than handcrafted classical approaches. Within this tutorial, there are there talks that present the state-of-the-art learning techniques used in digital and analog synthesis. Major challenges will also be discussed to motivate future research directions.
TimeMonday, July 10th10:30am - 12:00pm PDT
Location3008, 3rd Floor