Presenter Full Program · Contributors · Organizations · Search Program · My AgendaMore…Search ProgramMy AgendaJungyun ChoiSamsung ElectronicsPresentationsWork-in-Progress PosterLayNet: Layout Size Prediction for Memory Design Using Graph Neural Networks in Early Design StageAIAutonomous SystemsCloudDesignEDAEmbedded SystemsRISC-VSecurityEngineering Track PosterHierarchical Power Grid Analysis for 3D-ICBack-End DesignEmbedded SystemsFront-End DesignIPRISC-VBack-End DesignOver-Design Methodology for Operating Voltage MinimizationBack-End Design
